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500kHz Voltage Mode PWM Controller
POWER MANAGEMENT Description
The SC4614 is a high-speed, voltage mode PWM controller that provides the control and protection features necessary for a synchronous buck converter. The SC4614 is designed to directly drive the top and bottom MOSFETs of the buck converter. It allows the converter to operate at 500kHz switching frequency with 4V to 25V power rail and as low as 0.5V output. It uses an internal 8.2V supply as the gate drive voltage for minimum driver power loss and MOSFET switching loss. The SC4614 features soft-start, supply power under voltage lockout, and hiccup mode over current protection. The SC4614 monitors the output current by using the Rdson of the bottom MOSFET in the buck converter that eliminates the need for a current sensing resistor. The SC4614 is offered in a MSOP-10 package.
SC4614
Features
u 500kHz switching frequency u 4V to 25V power rails u 0.5V voltage reference for programmable output u u u u u u u
voltages Internal LDO for optimum gate drive voltage 1.5A gate drive current Adaptive non-overlapping gate drives provide shoot-through protection for MOSFETs Internal soft start Hiccup mode short circuit protection Power rail under voltage lockout MSOP-10 package, fully RoHS and WEEE compliant
Applications
u u u u u
Embedded, low cost, high efficiency converters Point of load power supplies Set top box power supplies PDP/TFT TVs Consumer electronics
Typical Application Circuit
12V IN
+
1 2 3 4 5
BST OCS COMP FB GND
DH PN DL VCC DRV
10 9 8 7 6 +
1.5V OUT
1 2
SC4614
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SC4614
POWER MANAGEMENT Absolute Maximum Ratings
Exceeding the specifications below may result in permanent damage to the device, or device malfunction. Operation outside of the parameters specified in the Electrical Characteristics section is not implied.
Parameter Input Supply Voltage BST to GND BST to PN PN to GND PN to GND Negative Pulse (tpulse < 20ns) DL to GND DL to GND Negative Pulse (tpulse < 20ns) DH to PN DH to PN Negative Pulse (tpulse < 20ns) DRV to GND Operating Ambient Temperature Range Operating Junction Temperature Thermal Resistance Junction to Ambient Thermal Resistance Junction to Case Lead Temperature (Soldering) 10s Storage Temperature
Symbol VCC VBST VBST_PN VPN VPN_PULSE VDL VDL_PULSE VDH_PN VDH_PULSE VDRV TA TJ JA JC TLEAD TSTG
Maximum 20 40 10 -1 to 30 -5 -1 to +10 -3 -1 to +10 -3 10 -40 to 85 -40 to 125 136 45 300 -65 to 150
Units V V V V V V V V V V C C C/W C/W C C
Electrical Characteristics
Unless specified: VCC = 5V to 18V; VFB = VO; VBST - VPN = 5V to 8.2V; TA = -40 to 85C
Parameter General VCC Supply Voltage VCC Quiescent Current VCC Under Voltage Lockout BST to PN Supply Voltage BST Quiescent Current Internal LDO LDO Output Dropout Voltage
Symbol
Conditions
Min
Typ
Max
Units
VCC IQVCC UVVCC VBST_PN IQBST VCC = 12V, VBST -VPN = 8.2V VCC = 12V, VBST -VPN = 8.2V VHYST = 100mV
4 5
18 7 4
V mA V V mA
4
10 3
VDRV VDROP
8.6V < VCC < 18V 4V < VCC < 8.6V
8.2 0.4
V V
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SC4614
POWER MANAGEMENT Electrical Characteristics
Unless specified: VCC = 5V to 18V; VFB = VO; VBST - VPN = 5V to 8.2V; TA = -40 to 85C
Parameter Sw itching Regulator Reference Voltage Load Regulation Line Regulation Operating Frequency Ramp Amplitude
(2)
Symbol
Conditions
Min
Typ
Max
Units
VREF
TA = 25C, VCC = 12V IO = 0.2 to 4A VCC = 10V to 14V
0.495
0.500 0.4 0.4
0.505
V % %
FS Vm DMAX TON_MIN tSRC_DH tSINK_DH tSRC_DL tSINK_DL 6V Swing at CL = 3.3nF VBST-VPN = 8.2V 6V Swing at CL = 3.3nF VDRV = 8.2V TA = 25C, VCC = 12V
400
500 0.8 97 125 41 27 29 42 30 1.5 2 40 80 10 0.9 0.9
600
kHz V % ns ns ns ns ms mV nA dB MHz mA mA V/us
Maximum Duty Cycle (2) Minimum On-Time
(2)
DH Rising/Falling Time DL Rising/Falling Time DH, DL Nonoverlapping Time Soft Start Time Voltage Error Amplifier Input Offset Voltage (2) Input Offset Current (2) Open Loop Gain
(2)
Unity Gain Bandwidth (2) Output Source Current Output Sink Current Slew Rate (2) For CL=500pF Load
1.2
Notes:
(1) This device is ESD sensitive. Use of standard ESD handling precautions is required. (2) Guaranteed by design, not tested in production.
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SC4614
POWER MANAGEMENT Pin Configuration
TOP VIEW
BST OCS COMP FB GND 1 2 3 4 5 10 9 8 7 6 DH PN DL VCC DRV
Ordering Information
Part Numbers SC4614MSTRT(1)(2) S C 4614E V B P ackag e MSOP-10
Note: (1) Only available in tape and reel packaging. A reel contains 2500 devices. (2) Lead free product. This product is fully WEEE and RoHS compliant.
(MSOP-10)
Pin Descriptions
Pin # 1 2 3 4 5 6 7 8 9 10 Pin Name BST OCS COMP FB GND DRV VC C DL PN DH Boost input for top gate drive bias. Current limit setting. Connect resistors from this pin to DRV pin and to ground to program the trip point of load current. Refer to Applications Information Section for details. Error amplifier output for compensation. Voltage feed back of sychronous buck converter. Chip ground. Internal LDO output. Connect a 1uF ceramic capasitor from this pin to ground for decoupling. This voltage is used for chip bias, including gate drivers. Chip input power supply. Gate drive for bottom MOSFET. Phase node. Connect this pin to bottom N-MOSFET drain. Gate drive for top MOSFET. Pin Function
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SC4614
POWER MANAGEMENT Block Diagram
8.2V
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SC4614
POWER MANAGEMENT Applications Information
THEORY OPERATION THEOR Y OF OPERATION
The SC4614 is a high-speed, voltage mode PWM controller that provides the control and protection features necessary for a synchronous buck converter. As shown in the block diagram of the SC4614, the voltage-mode PWM controller consists of an error amplifier, a 500kHz ramp generator, a PWM comparator, a RS latch circuit, and two MOSFET drivers. The buck converter output voltage is fed back to the error amplifier negative input and is regulated to a reference voltage level. The error amplifier output is compared with the ramp to generate a PWM wave, which is amplified and used to drive the MOSFETs in the buck converter. The PWM wave at the phase node with the amplitude of Vin is filtered out to get a DC output. The PWM controller works with softstart and fault monitoring circuitry to meet application requirements. UVLO, Start Up and Shut Down To initiate the SC4614, a supply voltage is applied to the Vcc pin. The top gate (DH) and bottom gate (DL) are held low until Vcc voltage exceeds UVLO (Under Voltage Lock Out) threshold, typically 4.0V. Then the internal Soft-Start (SS) capacitor begins to charge, the top gate remains low, and the bottom gate is pulled high to turn on the bottom MOSFET. When the SS voltage at the capacitor reaches 0.4V, the top and bottom gates of PWM controller begin to switch. The switching regulator output is slowly ramping up for a soft turn-on. If the supply voltages at the Vcc pin falls below UVLO threshold during a normal operation, the SS capacitor begins to discharge. When the SS voltage reaches 0.4V, the PWM controller controls the switching regulator output to ramp down slowly for a soft turn-off. Hiccup Mode Short Circuit Protection The SC4614 uses low-side MOSFET Rdson sensing for over current protection. In every switching cycle, after the bottom MOSFET is on for 150ns, the SC4614 detects the phase node voltage and compares it with an internal setting voltage. If the phase node is lower than the setting voltage, an overcurrent condition occurs. The SC4614 will discharge the internal SS capacitor and shutdown both outputs. After waiting for around 10 milliseconds, the SC4614 begins to charge the SS capacitor again and initiates a fresh startup. The startup and shutdown cycle will repeat until the short circuit is removed. This is called a hiccup mode short circuit protection.
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To program a load trip point for short circuit protection, it is recommended to connect a 3.3k resistor from the OCS pin to the ground, and a resistor Rset from the OCS pin to the DRV pin, as shown in Fig. 1.
12V 7 6 V CC DRV
Rset 2 OCS
3.3k
SC461 4
GND 5
Fig. 1. Programming load trip point
350 325 300 Vpn (mV) 275 250 225 200 175 150 0 100 200 300 Rset (k -ohm) 400 500 600
Fig. 2. Pull up resistor (Rset) vs. trip voltage Vpn
The resistor Rset can be found in Fig. 2 for a given phase node voltage Vpn at the load trip point. This voltage is the product of the inductor peak current at the load trip point and the Rdson of the low-side MOSFET:
V pn = I peak Rds _ on
The soft start time of the SC4614 is fixed at around 1.5ms. Therefore, the maximum soft start current is dewww.semtech.com
SC4614
POWER MANAGEMENT Applications Information (Cont.)
termined by the output inductance and output capacitance. The values of output inductor and output bulk capacitors have to be properly selected so that the soft start peak current does not exceed the load trip point of the short circuit protection. Internal LDO for Gate Drive An internal LDO is designed in the SC4614 to lower the 12V supply voltage for gate drive. A 1uF external ceramic capacitor connected in between DRV pin to the ground is needed to support the LDO. The LDO output is connected to the low gate drive internally, and has to be connected to the high gate drive through an external bootstrap circuit. The LDO output voltage is set at 8.2V. The manufacture data and bench tested results show that, for low Rdson MOSFETs run at applied load current, the optimum gate drive voltage is around 8.2V, where the total power losses of power MOSFETs are minimized. duction losses of the top and bottom MOSFETs are given by:
2 PC _ TOP = I O x Rdson x D 2 PC _ BOT = I O x Rdson x (1 - D )
If the requirement of total power losses for each MOSFET is given, the above equations can be used to calculate the values of Rdson and gate charge, then the devices can be determined accordingly. The solution should ensure the MOSFET is within its maximum junction temperature at highest ambient temperature. Output Capacitor The output capacitors should be selected to meet both output ripple and transient response criteria. The output capacitor ESR causes output ripple VRIPPLE during the inductor ripple current flowing in. To meet output ripple criteria, the ESR value should be:
COMPONENT SELECTION
General design guideline of switching power supplies can be applied to the component selection for the SC4614. Inductor MOSFETs Induct or and MOSFETs The selection of inductor and MOSFETs should meet thermal requirements because they are power loss dominant components. Pick an inductor with as high inductance as possible without adding extra cost and size. The higher inductance, the lower ripple current, the smaller core loss and the higher efficiency will be. However, too high inductance slows down output transient response. It is recommended to choose the inductance that creates an inductor ripple current of approximate 20% of maximum load current. So choose inductor value from:
RESR <
L x f OSC x VRIPPLE V VO x (1 - O ) VIN
The output capacitor ESR also causes output voltage transient VT during a transient load current IT flowing in. To meet output transient criteria, the ESR value should be:
RESR <
VT IT
To meet both criteria, the smaller one of above two ESRs is required. The output capacitor value also contributes to load transient response. Based on a worst case where the inductor energy 100% dumps to the output capacitor during the load transient, the capacitance then can be calculated by:
2 IT C > Lx 2 VT
L=
V 5 x VO x (1 - O ) I O x f osc VIN
The MOSFETs are selected by their Rdson, gate charge, and package specifications. The SC4614 provides 1.5A gate drive current and gives 50nC/1.5A=33ns switching time for driving a 50nC gate charge MOSFET. The switching time ts contributes to the top MOSFET switching loss:
PS = I O xVIN x t S x f OSC
There is no significant switching loss for the bottom MOSFET because of its zero voltage switching. The con 2005 Semtech Corp. 7
Input Capacitor The input capacitor should be chosen to handle the RMS ripple current of a synchronous buck converter. This value
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SC4614
POWER MANAGEMENT Applications Information (Cont.)
is given by:
SC4614 AND MOSFETS
I RMS = (1 - D ) x I
2 IN
+ D x ( I o - I IN )
2
REF FB + EA OUT Vc PWM MODULAT OR L Vo
where Io is the load current, IIN is the input average current, and D is the duty cycle. Choosing low ESR input capacitors will help maximize ripple rating for a given size. Bootstrap Circuit The SC4614 uses an external bootstrap circuit to provide a voltage at the BST pin for the top MOSFET drive. This voltage, referring to the Phase Node, is held up by a bootstrap capacitor. Typically, it is recommended to use a 1uF ceramic capacitor with 16V rating and a commonly available diode IN4148 for the bootstrap circuit. Filters for Supply Power For each pin of DRV and Vcc, it is recommended to use a 1uF/16V ceramic capacitor for decoupling. In addition, place a small resistor (10 ohm) in between the Vcc pin and the supply power for noise reduction.
Zs
COMP Zf Co
Resr
Fig. 3. Block diagram of the control loop
The model is a second order system with a finite DC gain, a complex pole pair at Fo, and an ESR zero at Fz, as shown in Fig. 4. The locations of the poles and zero are determined by:
CONTROL LOOP DESIGN
The goal of compensation is to shape the frequency response charateristics of the buck converter to achieve a better DC accuracy and a faster transient response for the output voltage, while maintaining the loop stability. The block diagram in Fig. 3 represents the control loop of a buck converter designed with the SC4614. The control loop consists of a compensator, a PWM modulator, and a LC filter. The LC filter and PWM modulator represent the small signal model of the buck converter operating at fixed switching frequency. The transfer function of the model is given by:
FO =
FZ =
1 LC
1 RESR C
VO VIN 1 + sRESRC = x VC Vm 1 + sL / R + s 2 LC
where VIN is the power rail voltage, Vm is the amplitude of the 500kHz ramp, and R is the equivalent load.
The compensator in Fig. 3 includes an error amplifier and impedance networks Zf and Zs. It is implemented by the circuit in Fig. 5. The compensator provides an integrator, double poles and double zeros. As shown in Fig. 4, the integrator is used to boost the gain at low frequency. Two zeros are introduced to compensate excessive phase lag at the loop gain crossover due to the integrator (-90deg) and complex pole pair (-180deg). Two high frequency poles are designed to compensate the ESR zero and attenuate high frequency noise.
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SC4614
POWER MANAGEMENT Applications Information (Cont.)
60
Fp1
COM PENSATOR GAI N
(2). Select the open loop crossover frequency Fc located at 10% to 20% of the switching frequency. At Fc, find the required DC gain.
Fp2
30
Fz1 Fz2 Fo
CO NV ER TE RG AI N LO
(3). Use the first compensator pole Fp1 to cancel the ESR zero Fz. (4). Have the second compensator pole Fp2 at half the switching frequency to attenuate the switching ripple and high frequency noise. (5). Place the first compensator zero Fz1 at or below 50% of the power stage resonant frequency Fo.
1M
GAIN (dB)
OP GA IN
0
Fz
Fc
-30
-60 100 1K 10K FR EQ UENCY (Hz ) 100 K
(6). Place the second compensator zero Fz2 at or below the power stage resonant frequency Fo. A MathCAD program is available upon request for the calculation of the compensation parameters.
Fig. 4. Bode plots for control loop design
C2
LAY LAYOUT GUIDELINES
R2 C3 R3 Vo
2 3
C1 Vc
1
Rtop Rbot
VREF
The switching regulator is a high di/dt power circuit. Its Printed Circuit Board (PCB) layout is critical. A good layout can achieve an optimum circuit performance while minimizing the component stress, resulting in better system reliability. During PCB layout, the SC4614 controller, MOSFETs, inductor, and power decoupling capacitors have to be considered as a unit. The following guidelines are typically recommended for using the SC4614 controller. (1). Place a 4.7uF to 10uF ceramic capacitor close to the drain of top MOSFET for the high frequency and high current decoupling. The loop formed by the capacitor, the top and bottom MOSFETs must be as small as possible. Keep the input bulk capacitors close to the drain of the top MOSFETs. (2). Place the SC4614 over a quiet ground plane to avoid pulsing current noise. Keep the ground return of the gate drive short. (3). Connect bypass capacitors as close as possible to the decoupling pins (DRV and Vcc) to the ground pin GND. The trace length of the decoupling capacitor on DRV pin should be no more than 0.2" (5mm). (4). Locate the components of the bootstrap circuit close to the SC4614.
0.5V
Fig. 5. Compensation network
The top resistor Rtop of the voltage divider in Fig. 5 can be chosen from 1k to 5k. Then the bottom resistor Rbot is found from:
Rbot =
0.5V x Rtop VO - 0.5V
where 0.5V is the internal reference voltage of the SC4614. The other components of the compensator can be calculated using following design procedure: (1). Plot the converter gain, including LC filter and PWM modulator.
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SC4614
POWER MANAGEMENT Applications Information (Cont.)
Typical Input Typical Application Schematics with 12V In put
12V
Rcc 2R2 Q1 Rli m it 3.3k R4 499k U1 1 2 3 4 5 BST OCS COMP FB GND DH PN DL VCC DRV 10 9 8 7 6 C18 1uF C17 1uF C15 1uF 1 L1 1.2uH R11 1R0 2 R12 14.7k R8 301 C9 2.2nF + C5 1800uF + C6 1800uF C13 2.2nF R15 7.32k C7 10uF IPD05N03 C4 10uF + C3 1800uF
0
0
1.5V/15A
D1 D1N4148
Q3 IPD05N03
0
C8 10nF R13 11.5k C10 680pF
SC4614
0
0
Bill of Materials (12V Input)
Item 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 Quantity 1 1 1 2 3 1 1 1 1 1 1 2 1 1 1 1 1 1 1 1 1 Reference C4 C7 C3 C5,C6 C15,C17,C18 C9 C13 C8 C10 D1 L1 Q3,Q1 Rcc Rlimit R4 R8 R11 R12 R15 R13 U1 Part 10uF/16V 10uF/6.3V 1800uF/16V 1800uF/6.3V 1uF 2.2nF 2.2nF 10nF 680pF D1N4148 1.2uH IPD05N03 2R2 3.3k 499k 301 1R0 14.7k 7.32k 11.5k SC4614
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Vendor Vishay Vishay Rubycon, MBZ Rubycon, MBZ Vishay Vishay Vishay Vishay Vishay Any Cooper Electr. Tech Infineon Vishay Vishay Vishay Vishay Vishay Vishay Vishay Vishay SEMTECH
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SC4614
POWER MANAGEMENT Applications Information (Cont.)
erf Characteristics Input) P er formance Characteristics (12V In put) Efficiency (%) vs Load Current
90 85 80 75 70 65 60 1 3 5 7 9 11 13 15
Start up
12V Input (5V/DIV)
1.5V Output (1V/DIV)
Load Current (A)
X=5ms/DIV
Load Characteristics (Output vs Load Current)
1.6 1.4 1.2 1.0 0.8 0.6 0.4 0.2 0.0 0 5 10 15 20
Transient Response
1.5V Output Respo nse (100mV/DIV)
Step Load Current (10A/DIV)
Load Current(A)
X=20us/DIV
Gate Waveforms (Io=15A)
Short Circuit Protection
Output Short
DL (10V/DIV) DH (10V/DIV)
1.5V OUT (1V/DIV)
PN (10V/DIV)
Output Current (10A/DIV)
X=50ns/DIV
X=5ms/DIV
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SC4614
POWER MANAGEMENT Applications Information (Cont.)
Typical Input Typical Application Schematics with 25V In put
Vin=25V
Rcc 732 Q1 Rli mit 3.3k R4 499k U1 1 2 3 4 5 BST OCS COMP FB GND DH PN DL VCC DRV 10 9 8 7 6 C17 1uF IRLR7821 C13 2.2nF R15 2.43k C15 1uF 1 2.2uH R11 1R0 R12 22k L1 2 R8 301 C9 2.2nF + C6 1800uF C7 10uF IRLR7821 C4 10uF + C3 1800uF
0
0
5V /10A
D1 D1N4148
Q3
0
C8 4.7nF C10 1nF R13 22k
SC4614
C18 1uF D2
0
0 BZX84B16LT1 0 Note: Zener diode D2 is required when Vin is 18V or higher.
Bill of Materials (25V Input)
Item 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 Quantity 1 1 1 1 3 1 1 1 1 1 1 1 2 1 1 1 1 1 1 1 1 1 Reference C4 C7 C3 C6 C15,C17,C18 C9 C13 C8 C10 D1 D2 L1 Q3,Q1 Rcc Rlimit R4 R8 R11 R12 R15 R13 U1 Part 10uF/35V 10uF/6.3V 1800uF/35V 1500uF/6.3V 1uF 2.2nF 2.2nF 4.7nF 1nF D1N4148 BZX84B16LT1 2.2uH IRLR7821 732 3.3k 499k 301 1R0 22k 2.43k 22k SC4614 Vendor Murata Vishay Rubycon Rubycon, MBZ Vishay Vishay Vishay Vishay Vishay Any ON Semi Cooper Electr. Tech IR Vishay Vishay Vishay Vishay Vishay Vishay Vishay Vishay SEMTECH
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SC4614
POWER MANAGEMENT Applications Information (Cont.)
erf Characteristics Input) P er formance Characteristics (25V In put) Efficiency (%) vs Load Current
92 90 88 86 84 82 80 78 76 1 2 3 4 5 6 7 8 9 10 Load Current (A)
Start up
25V Input (10V/DIV)
5V Output (2V/DIV)
X=5ms/DIV
Gate Waveforms (Io=10A)
Transient Response
5V Output Response (200mV/DIV)
DL (10V/DIV) DH (10V/DIV) PN (10V/DIV)
Step Load Current (10A/DIV)
X=100ns/DIV
X=20us/DIV
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SC4614
POWER MANAGEMENT Outline Drawing - MSOP-10
e A N 2X E/2 E1 E D
DIM
A A1 A2 b c D E1 E e L L1 N 01 aaa bbb ccc
DIMENSIONS INCHES MILLIMETERS MIN NOM MAX MIN NOM MAX
.043 .000 .006 .030 .037 .011 .007 .003 .009 .114 .118 .122 .114 .118 .122 .193 BSC .020 BSC .016 .024 .032 (.037) 10 0 8 .004 .003 .010 1.10 0.00 0.15 0.75 0.95 0.17 0.27 0.08 0.23 2.90 3.00 3.10 2.90 3.00 3.10 4.90 BSC 0.50 BSC 0.40 0.60 0.80 (.95) 10 0 8 0.10 0.08 0.25
PIN 1 INDICATOR ccc C 2X N/2 TIPS 12 B
D aaa C SEATING PLANE A2 C A1 bxN bbb C A-B D A GAGE PLANE 0.25 (L1) DETAIL SIDE VIEW
NOTES: 1. 2. 3. 4. CONTROLLING DIMENSIONS ARE IN MILLIMETERS (ANGLES IN DEGREES). DATUMS -A- AND -B- TO BE DETERMINED AT DATUM PLANE -HDIMENSIONS "E1" AND "D" DO NOT INCLUDE MOLD FLASH, PROTRUSIONS OR GATE BURRS. REFERENCE JEDEC STD MO-187, VARIATION BA.
H c
L
01
A
SEE DETAIL
A
Land Pattern - MSOP-10
X
DIM
(C) G Z C G P X Y Z
DIMENSIONS INCHES MILLIMETERS
(.161) .098 .020 .011 .063 .224 (4.10) 2.50 0.50 0.30 1.60 5.70
Y P
NOTES: 1. THIS LAND PATTERN IS FOR REFERENCE PURPOSES ONLY. CONSULT YOUR MANUFACTURING GROUP TO ENSURE YOUR COMPANY'S MANUFACTURING GUIDELINES ARE MET.
Contact Information
Semtech Corporation Power Management Products Division 200 Flynn Road, Camarillo, CA 93012 Phone: (805)498-2111 FAX (805)498-3804
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